FPGA BASED SDR FOR DPLL APPLICATION

NIKITA KATOLE, SHWETA THAKUR

ISSN No.(E):2581-4230

Volume 3 Issue 4

FPGA BASED SDR FOR DPLL APPLICATION (20150288)

DOI :

Authors : NIKITA KATOLE , SHWETA THAKUR

Abstracts : To design and develop a system on chip reconfigurable modules Field Programmable Gate Array (FPGA) provides a way with high performance. In this paper, FPGA architecture is proposed, which would be a starting point for developing an efficient Software Defined Radio (SDR) architecture for recovering audio signals from digitally modulated frequency wave. At the modulator and demodulator sections, a Digital Frequency Generator (DFG) is applied for generating the carrier wave by exploiting the quarter wave symmetry of sine or cosine waves with dynamic range of more than 90dB.

Pages : 104-106

Download Paper

Downloads : 95

Publication Date : 2017-04-25

Modified Date : 2018-01-17

Cite/Export

NIKITA KATOLE , SHWETA THAKUR , "FPGA BASED SDR FOR DPLL APPLICATION", JournalNX - A Multidisciplinary Peer Reviewed Journal, Volume 3 Issue 4, ISSN : 2581-4230, Page No. 104-106