Volume 3 Issue 4

FPGA BASED SDR FOR DPLL APPLICATION (20150288)

DOI :
Authors :
Abstracts : To design and develop a system on chip reconfigurable modules Field Programmable Gate Array (FPGA) provides a way with high performance. In this paper, FPGA architecture is proposed, which would be a starting point for developing an efficient Software Defined Radio (SDR) architecture for recovering audio signals from digitally modulated frequency wave. At the modulator and demodulator sections, a Digital Frequency Generator (DFG) is applied for generating the carrier wave by exploiting the quarter wave symmetry of sine or cosine waves with dynamic range of more than 90dB.
Pages : 104-106
Downloads : 110
Publication Date :
Modified Date : 2018-01-17
Cite/Export
NIKITA KATOLE , SHWETA THAKUR , "FPGA BASED SDR FOR DPLL APPLICATION", JournalNX - A Multidisciplinary Peer Reviewed Journal, Volume 3 Issue 4, ISSN : 2581-4230, Page No. 104-106
Peer reviewed